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Wired and Wireless Inter-Chip and Intra-Chip Communications
The performance of the deep sub-micron technology CMOS integrated circuits is limited by the wired chip-to-chip and on-chip interconnects. This work proposes two technologies for widening up this bottleneck. For the on-chip buses we propose the introduction of spatial and temporal coding techniques, which provide substantial increase of the data rate at the price of a simple coding hardware. The ...

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